Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
S
SWEN90006-A1-2018
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
GitLab community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Emily Marshall
SWEN90006-A1-2018
Commits
1e3b90c8
Commit
1e3b90c8
authored
Sep 10, 2018
by
Emily Marshall
Browse files
Options
Downloads
Patches
Plain Diff
Update Machine.java
parent
bccf79b3
Branches
Branches containing commit
No related tags found
No related merge requests found
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
mutants/mutant-4/swen90006/machine/Machine.java
+11
-2
11 additions, 2 deletions
mutants/mutant-4/swen90006/machine/Machine.java
with
11 additions
and
2 deletions
mutants/mutant-4/swen90006/machine/Machine.java
+
11
−
2
View file @
1e3b90c8
//abs value of register value in ADD:
//may not be caught if test cases don't include
//negative values for ADD insturction.
package
swen90006.machine
;
package
swen90006.machine
;
import
java.util.Arrays
;
import
java.util.Arrays
;
...
@@ -58,7 +61,11 @@ public class Machine
...
@@ -58,7 +61,11 @@ public class Machine
private
void
do_add
(
int
dest
,
int
src1
,
int
src2
)
private
void
do_add
(
int
dest
,
int
src1
,
int
src2
)
{
{
regs
[
dest
]
=
regs
[
src1
]
+
regs
[
src2
];
regs
[
dest
]
=
regs
[
src1
]
+
abs
(
regs
[
src2
]);
//abs value of register value in ADD:
//may not be caught if test cases don't include
//negative values for ADD insturction.
}
}
private
void
do_sub
(
int
dest
,
int
src1
,
int
src2
)
private
void
do_sub
(
int
dest
,
int
src1
,
int
src2
)
...
@@ -77,6 +84,7 @@ public class Machine
...
@@ -77,6 +84,7 @@ public class Machine
/* no op */
/* no op */
}
else
{
}
else
{
regs
[
dest
]
=
regs
[
src1
]
/
regs
[
src2
];
regs
[
dest
]
=
regs
[
src1
]
/
regs
[
src2
];
}
}
}
}
...
@@ -168,9 +176,10 @@ public class Machine
...
@@ -168,9 +176,10 @@ public class Machine
int
instructionsExecuted
=
0
;
int
instructionsExecuted
=
0
;
int
pc
=
0
;
int
pc
=
0
;
final
int
progLength
=
instructions
.
size
();
final
int
progLength
=
instructions
.
size
()
-
1
;
while
(
true
){
while
(
true
){
if
(
pc
<
0
||
pc
>=
progLength
){
if
(
pc
<
0
||
pc
>=
progLength
){
/* will cause NoReturnValueException to be thrown
/* will cause NoReturnValueException to be thrown
* but that is not a bug and and indeed is what the
* but that is not a bug and and indeed is what the
* VM is supposed to do if the pc becomes negative,
* VM is supposed to do if the pc becomes negative,
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment